As the density of interconnects in electronics packaging increases and the size of microelectronic devices decreases, the formation of solder joints during the assembly process becomes increasingly important.
However, the failure to achieve interconnect yield due to poor solder wetting leads to increased costs in electronics manufacturing.
In this white paper, you’ll uncover how we developed a solder interconnect wetting dynamics model, including the impact of environmental temperature and geometry. You’ll also gain access to a new analysis methodology to predict solder interconnect wetting. Finally, you’ll receive solutions to address causes of poor wetting during electronics assembly in order to reduce design, development, and implementation time.
Download the white paper now.